Preliminary
K5A3x80YT(B)C
MCP MEMORY
Flash SWITCHING WAVEFORMS
Toggle Bit During Internal Routine Operation
tAS
tAHT
Address*
tASO
tAHT
CE
F
tOEH2
tCEPH
WE
OE
tOEPH
tDH
tOE
Status
Data
Status
Data
Status
Data
Data In
DQ6/DQ2
RY/BY
Array Data Out
NOTE: Address for the write operation must include a bank address (A19~A20) where the data is written.
Enter
Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
Erase
Resume
Erase
Erase Suspend
Read
Erase Suspend
Read
Erase
Erase
Complete
WE
DQ6
DQ2
Erase
Suspend
Program
Toggle
DQ2 and DQ6
with OE or CEF
NOTE: DQ2 is read from the erase-suspended block.
70ns
80ns
Parameter
Symbol
Unit
Min
-
Max
Min
-
Max
Output Enable Access Time
OE Hold Time
tOE
tOEH2
tAHT
tASO
tAS
25
-
25
-
ns
ns
ns
ns
ns
ns
ns
ns
10
0
10
0
Address Hold Time
Address Setup
-
-
55
0
-
55
0
-
Address Setup Time
Data Hold Time
-
-
tDH
0
-
0
-
CE High during toggle bit polling
tCEPH
tOEPH
20
20
-
20
20
-
F
OE High during toggle bit polling
-
-
Revision 0.0
November 2002
- 38 -