256M GDDR3 SDRAM
K4J55323QG
Nonconsecutive READ Bursts
T0
T7
T8
T8n
T9
T9n
T10
T17
T17n
T18
/CK
CK
COMMAND
ADDRESS
READ
NOP
NOP
READ
NOP
NOP
NOP
Bank a,
Col n
Bank a,
Col b
CL = 8
RDQS
DQ
DO
DO
n
b
T0
T1
T7
T8
T8n
T9
T10
T10n
T11
/CK
CK
COMMAND
ADDRESS
READ
NOP
NOP
READ
NOP
NOP
NOP
Bank a,
Col n
Bank a,
Col b
CL = 8
RDQS
DQ
DO
DO
n
b
DON’T CARE
TRANSITIONING DATA
1. DO n (or b) = data-out from column n (or column b).
2. Burst length = 4
NOTE :
3. Three subsequent elements of data-out appear in the programmed order following DQ n.
4. Three subsequent elements of data-out appear in the programmed order following DQ b.
5. Shown with nominal tAC and tDQSQ.
6. Example applies when READ commands are issued to different devices or nonconsecutive READs.
7. RDQS will start driving high one half-clock cycle prior to the first falling edge of RDQS.
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Rev. 1.1 November 2005