R8C/13 Group
13.2 Clock Asynchronous Serial I/O (UART) Mode
13.2 Clock Asynchronous Serial I/O (UART) Mode
The UART mode allows transmitting and receiving data after setting the desired bit rate and transfer data
format. Tables 13.4 lists the specifications of the UART mode. Table 13.5 lists the registers and settings
for UART mode.
Table 13.4 UART Mode Specifications
Item
Specification
Transfer data format
• Character bit (transfer data): selectable from 7, 8 or 9 bits
• Start bit: 1 bit
• Parity bit: selectable from odd, even, or none
• Stop bit: selectable from 1 or 2 bits
Transfer clock
• UiMR(i=0, 1) register CKDIR bit = 0 (internal clock) : fj/(16(n+1))
fj=f1SIO, f8SIO, f32SIO n=setting value in UiBRG register: 0016 to FF16
• CKDIR bit = “1” (external clock) : fEXT/(16(n+1))
fEXT: input from CLKi pin n=setting value in UiBRG register: 0016 to FF16
Transmission start condition • Before transmission can start, the following requirements must be met
_ TE bit in UiC1 register= 1 (transmission enabled)
_ TI bit in UiC1 register = 0 (data present in UiTB register)
Reception start condition
• Before reception can start, the following requirements must be met
_ RE bit in UiC1 register= 1 (reception enabled)
_ Start bit detection
Interrupt request
generation timing
• For transmission, one of the following conditions can be selected
_ UiIRS bit = 0 (transmit buffer empty): when transferring data from UiTB register to
UARTi transmit register (at start of transmission)
_ UiIRS bit =1 (transfer completed): when serial interface finished sending data from
UARTi transmit register
• For reception
When transferring data from UARTi receive register to UiRB register (at completion
of reception)
Error detection
• Overrun error(1)
This error occurs if serial interface started receiving the next data before reading
UiRB register and received the bit one before the last stop bit of the next data
• Framing error
This error occurs when the number of stop bits set is not detected
• Parity error
This error occurs when if parity is enabled, the number of 1’s in parity and character
bits does not match the number of 1’s set
• Error sum flag
This flag is set (= 1) when any of the overrun, framing, and parity errors is encountered
Select function
NOTES:
• TXD10, RXD1 selection (UART)
P37 pin can be used as RxD1 pin or TxD10 pin in UART1. Select by a program.
• TxD11 pin selection (UART1)
P00 pin can be used as TxD11 pin in UART1 or port P00. Select by a program.
1. If an overrun error occurs, the value of U0RB register will be indeterminate. The IR bit in the S0RIC register does
not change.
Rev.1.20 Jan 27, 2006 page 119 of 205
REJ09B0111-0120
RENESAS [ RENESAS TECHNOLOGY CORP ]
