R8C/13 Group
13. Serial Interface
Clock
synchronous
type
Clock
synchronous
type
PRYE=1
PAR
disabled
UART (7 bits)
UART (8 bits)
UARTi receive register
UART (7 bits)
1SP
2SP
PAR
SP
SP
RxDi
UART
PAR
enabled
UART (9 bits)
Clock
synchronous type
PRYE=0
UART (8 bits)
UART (9 bits)
UiRB register
0
0
0
0
0
0
0
D8
D7 D6 D5 D4 D3 D2 D1 D0
MSB/LSB conversion circuit
Data bus high-order bits
Data bus low-order bits
MSB/LSB conversion circuit
UiTB register
D7 D6 D5 D4 D3 D2 D1 D0
D8
UART (8 bits)
UART (9 bits)
Clock
synchronous
type
UART (9 bits)
PRYE=1
PAR
enabled
UART
Clock
2SP
1SP
PAR
SP
SP
TxDi
PAR
UART (7 bits)
UARTi transmit register
UART (7 bits)
UART (8 bits)
disabled synchronous
PRYE=0
type
Clock
synchronous type
i=0, 1
SP: Stop bit
PAR: Parity bit
“0”
NOTES:
1. Clock synchronous type is provide in UART0 only.
Figure 13.2 UARTi Transmit/Receive Unit
Rev.1.20 Jan 27, 2006 page 110 of 205
REJ09B0111-0120
RENESAS [ RENESAS TECHNOLOGY CORP ]
