R8C/13 Group
12.4 Timer (Timer C)
Match
Set value in TM1 register
Count start
Match
Match
Set value in TM0 register
000016
Time
Set to “1” by program
“1”
TCC00 bit in
TCC0 register
“0”
Set to “0” when interrupt request is accepted, or set by program
“1”
“0”
IR bit in CMP0IC
register
Set to “0” when interrupt request is
accepted, or set by program
“1”
“0”
IR bit in CMP1IC
register
“1”
“0”
CMP0
CMP1
0
output
output
“1”
“0”
0
The above applies to the following conditions.
TCC12 bit in TCC1 register=1 (TC register is set to “000016” at Compare 1 match occurrence )
TCC13 bit in TCC1 register=1 (Compare 0 output selected)
TCC15 to TCC14 bits in TCC1 register =112 (CMP output level is set to high at Compare 0 match
occurrence)TCC17 to TCC16 bits in TCC1 register=102 (CMP output level is set to low at Compare 1 match
occurrence)
TCOUT6 bit in TCOUT register=0 (not reversed)
TCOUT7 bit in TCOUT register =1 (reversed)
TCOUT0 bit in TCOUT register=1 (CMP0
TCOUT3 bit in TCOUT register=1 (CMP1
P1_0 bit in P1 register=1 (high)
0
output enabled)
output enabled)
0
P3_0 bit in P3 register=1 (high)
Figure 12.34 Operation Example of Timer C in Output Compare Mode
Rev.1.20 Jan 27, 2006 page 108 of 205
REJ09B0111-0120
RENESAS [ RENESAS TECHNOLOGY CORP ]
