3858 Group
■ Notes
When not requiring for the interrupt occurrence synchronized with
these setting, take the following sequence.
When setting the followings, the interrupt request bit may be set to
“1”.
■Set the corresponding interrupt enable bit to “0” (disabled).
■Set the interrupt edge select bit or the interrupt source select bit
to “1”.
•When setting external interrupt active edge
Related register: Interrupt edge selection register (address 003A16)
Timer XY mode register (address 002316)
Timer Z1 mode register (address 002816)
Timer Z2 mode register (address 002B16)
•When switching interrupt sources of an interrupt vector address
where two or more interrupt sources are allocated
Related register: Interrupt source selection register
(address 003616)
■Set the corresponding interrupt request bit to “0” after 1 or more
instructions have been executed.
■Set the corresponding interrupt enable bit to “1” (enabled).
Interrupt request bit
Interrupt enable bit
Interrupt disable flag (I)
BRK instruction
Reset
Interrupt request
Fig. 15 Interrupt control
Rev.1.10 Apr 3, 2006 page 20 of 75
REJ03B0139-0110
RENESAS [ RENESAS TECHNOLOGY CORP ]
