3858 Group
INTERRUPTS
The 3858 group's interrupts are a type of vector and occur by 16
sources among 19 sources: eight external, ten internal, and one
software.
Interrupt Control
Each interrupt is controlled by an interrupt request bit, an interrupt
enable bit, and the interrupt disable flag except for the software in-
terrupt set by the BRK instruction. An interrupt occurs if the
corresponding interrupt request and enable bits are “1” and the in-
terrupt disable flag is “0”.
Interrupt enable bits can be set or cleared by software.
Interrupt request bits can be cleared by software, but cannot be
set by software.
The reset and the BRK instruction cannot be disabled with any
flag or bit. The I (interrupt disable) flag disables all interrupts ex-
cept the reset and the BRK instruction interrupt.
When several interrupt requests occur at the same time, the inter-
rupts are received according to priority.
Interrupt Operation
By acceptance of an interrupt, the following operations are auto-
matically performed:
1. The contents of the program counter and the processor status
register are automatically pushed onto the stack.
2. The interrupt disable flag is set and the corresponding interrupt
request bit is cleared.
3. The interrupt jump destination address is read from the vector
table into the program counter.
Interrupt Source Selection
Which of each combination of the following interrupt sources can
be selected by the interrupt source selection register (address
003916).
1. INT3 or Serial I/O2
2. Timer Z1 or CNTR2
3. Timer Z2 or CNTR3
4. CNTR0 or CNTR2
5. CNTR1 or CNTR3
Rev.1.10 Apr 3, 2006 page 18 of 75
REJ03B0139-0110
RENESAS [ RENESAS TECHNOLOGY CORP ]
