3858 Group
b7
b0
Interrupt edge selection register
(INTEDGE : address 003A16
)
INT
INT
INT
INT
0
1
2
3
active edge selection bit
0 : Falling edge active
1 : Rising edge active
active edge selection bit
active edge selection bit
active edge selection bit
Not used (returns “0” when read)
b7
b0
b7
b0
Interrupt request register 1
Interrupt request register 2
(IREQ2 : address 003D16
)
(IREQ1 : address 003C16
)
INT interrupt request bit
0
Timer 1 interrupt request bit
Timer Z1/CNTR2 interrupt request bit
Timer 2 interrupt request bit
INT
INT
INT
1
2
3
interrupt request bit
Serial I/O1 receive interrupt request bit
Serial I/O1 transmit interrupt request bit
interrupt request bit
/Serial I/O2 interrupt request bit
CNTR
CNTR
0
/CNTR
2
3
interrupt request bit
interrupt request bit
Timer Z2/CNTR3 interrupt request bit
1/CNTR
Timer X interrupt request bit
Timer Y interrupt request bit
AD converter interrupt request bit
Not used (returns “0” when read)
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
b7
b0
b7
b0
Interrupt control register 2
Interrupt control register 1
(ICON2 : address 003F16
)
(ICON1 : address 003E16
)
INT
0 interrupt enable bit
Timer 1 interrupt enable bit
Timer Z1/CNTR
2
interrupt enable bit
Timer 2 interrupt enable bit
INT
INT
INT
1
2
3
interrupt enable bit
Serial I/O1 receive interrupt enable bit
Serial I/O1 transmit interrupt enable bit
interrupt enable bit
/Serial I/O2 interrupt enable bit
CNTR
CNTR
0
/CNTR
2
3
interrupt enable bit
interrupt enable bit
Timer Z2/CNTR3 interrupt enable bit
Timer X interrupt enable bit
Timer Y interrupt enable bit
1/CNTR
AD converter interrupt enable bit
Not used (returns “0” when read)
(Do not write “1” to this bit)
0 : Interrupts disabled
1 : Interrupts enabled
0 : Interrupts disabled
1 : Interrupts enabled
b0
b7
Interrupt source selection register
(INTSEL: address 003616
)
INT3/Serial I/O2 interrupt source selection bit
0 : INT interrupt
1 : Serial I/O2 interrupt
Timer Z1/CNTR interrupt source selection bit
0 : Timer Z1 interrupt
1 : CNTR interrupt
Timer Z2/CNTR interrupt source selection bit
0 : Timer Z2 interrupt
1 : CNTR interrupt
CNTR /CNTR interrupt source selection bit
3
2
2
3
3
0
2
0 : CNTR
1 : CNTR
0
2
interrupt
interrupt
CNTR1/CNTR3 interrupt source selection bit
0 : CNTR
1 : CNTR
1
3
interrupt
interrupt
Not used (returns “0” when read)
Fig. 16 Structure of interrupt-related registers
Rev.1.10 Apr 3, 2006 page 21 of 75
REJ03B0139-0110
RENESAS [ RENESAS TECHNOLOGY CORP ]
