3858 Group
Table 6 Interrupt vector addresses and priority
Vector Addresses (Note 1)
Interrupt Request
Generating Conditions
Remarks
Non-maskable
Interrupt Source
Priority
High
Low
1
2
FFFD16
FFFB16
FFFC16
FFFA16
Reset (Note 2)
INT0
At reset
At detection of either rising or
falling edge of INT0 input
External interrupt
(active edge selectable)
Timer Z1
CNTR2
3
FFF916
FFF816
At timer Z1 underflow
At detection of either rising or
falling edge of CNTR2 input
External interrupt
(active edge selectable)
INT1
4
5
6
FFF716
FFF516
FFF316
FFF616
FFF416
FFF216
At detection of either rising or
falling edge of INT1 input
External interrupt
(active edge selectable)
INT2
At detection of either rising or
falling edge of INT2 input
External interrupt
(active edge selectable)
INT3
At detection of either rising or
falling edge of INT3 input
External interrupt
(active edge selectable)
Serial I/O2
At completion of serial I/O2 data
transmission or reception
Valid when serial I/O2 is selected
Timer Z2
CNTR3
7
FFF116
FFF016
At timer Z2 underflow
At detection of either rising or
falling edge of CNTR3 input
External interrupt
(active edge selectable)
Timer X
Timer Y
Timer 1
Timer 2
8
FFEF16
FFED16
FFEB16
FFE916
FFE716
FFEE16
FFEC16
FFEA16
FFE816
FFE616
At timer X underflow
At timer Y underflow
At timer 1 underflow
At timer 2 underflow
9
10
11
12
STP release timer underflow
Serial I/O1
reception
At completion of serial I/O1 data
reception
Valid when serial I/O1 is selected
Valid when serial I/O1 is selected
Serial I/O1
transmission
13
14
FFE516
FFE316
FFE416
FFE216
At completion of serial I/O1
transmission shift or when
transmission buffer is empty
CNTR0
CNTR2
CNTR1
CNTR3
At detection of either rising or
falling edge of CNTR0 input
External interrupt
(active edge selectable)
At detection of either rising or
falling edge of CNTR2 input
15
FFE116
FFE016
At detection of either rising or
falling edge of CNTR1 input
External interrupt
(active edge selectable)
At detection of either rising or
falling edge of CNTR3 input
A/D converter
16
17
FFDF16
FFDD16
FFDE16
FFDC16
At completion of A/D conversion
At BRK instruction execution
BRK instruction
Non-maskable software interrupt
Notes 1: Vector addresses contain interrupt jump destination addresses.
2: Reset function in the same way as an interrupt with the highest priority.
Rev.1.10 Apr 3, 2006 page 19 of 75
REJ03B0139-0110
RENESAS [ RENESAS TECHNOLOGY CORP ]
