MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
7
6
5
4
3
2
1
0
Particular function select register 1 (6D16)
TC1 TC0
Transmit clock output pin select bit
00 : Normal mode (output only to CLK0)
01 : Plural clocks specified; output to CLK0
10 : Plural clocks specified; output to CLKS0
11 : Plural clocks specified; output to CLKS1
Internal clock stop select bit at WIT (Note 1)
0 : Clock for peripheral function and watchdog timer are operating at WIT
1 : Internal clock except that for oscillation circuit and watchdog timer are stopped at WIT
Watchdog timer’s select bit (Note 1)
0 : Exclusive clock deviding circuit output (Wf512, Wf32) is used as clock for watchdog
timer. Clock (Wf512, Wf32) for watchdog timer does not change in hold.
1 : Clock for peripheral device deviding circuit output (Pf512, Pf32) is used as clock for
watchdog timer. Clock (Pf512, Pf32) for watchdog timer changes in hold.
Watchdog timer exclusive clock dividing circuit is stopped.
Signal output stop select bit (Note 1)
Refer to Table 8.
Expansion function select bit (Note 2)
Refer to Figure 62.
Pull-up select bit 0 (Note 3)
0 : With no pull-up for P57, P56, P55, P54
1 : With pull-up for P57, P56, P55, P54
Pull-up select bit 1 (Note 3)
0 : With no pull-up for P95
1 : With pull-up for P95
Control bits affected by expansion
function select bit
Control registers affected by expansion
function select register
Register
Address
1F16
Bit
5
Register
Address
1A16
A-D control register 1
Waveform output mode register
Dead-time timer
Chip select area register
6316 2, 5, 6, 7
6C16 0, 1, 5, 6
6D16 2, 3, 4
1B16
Particular function select register 0
Particular function select register 1
Pulse output data register 1
Pulse output data register 0
1C16
1D16
4516
Timer A write flag
____
INT4
interrupt control register
6E16
Notes 1: Bits 2, 3, and 4 can be re-write after bit 5 (expansion function select bit) is set to “1.”
2: After bit 5 is set to “1” once, bit 5 cannot be cleared to “0” except external reset and software reset.
3: Bits 6 and 7 are write-only bits and undefined at read. Do not use SEB or CLB insturuction when setting bits 0–7.
Fig. 63 Particular function select register 1 bit configuration
51