Table 1.3 Pin Functions (cont)
Memory Interface
Pin
No.
145
146
147
148
149
150
Pin Name
D48
I/O
I/O
I/O
Function
Data/port
Data
Reset
SRAM DRAM SDRAM PCMCIA MPX
(Port)
(Port)
(Port)
(Port)
(Port)
D63
ACCSIZE2
VDDQ
VSSQ
MD0/SCK
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
Mode/SCI clock MD0
SCK
SCK
SCK
SCK
SCK
MD1/TXD2 I/O
Mode SCIF data MD1
output
TXD2
TXD2
TXD2
TXD2
TXD2
151
MD2/RXD2
I
Mode/SCIF data MD2
input
RXD2
RXD2
RXD2
RXD2
RXD2
152
153
154
155
156
,5/3
,5/4
,5/5
,5/6
NMI
I
I
I
I
I
Interrupt 0
Interrupt 1
Interrupt 2
Interrupt 3
Nonmaskable
interrupt
157
158
159
160
XTAL2
O
I
RTC crystal
resonator pin
EXTAL2
VSS-RTC
VDD-RTC
RTC crystal
resonator pin
Power RTC GND
(0 V)
Power RTC VDD
(3.3 V)
161
162
CA
I
*
VSS
Power Internal GND
(0 V)
163
164
VDDQ
Power IO VDD (3.3 V)
&765
I/O
SCIF data control
(&76)
165
166
167
TCLK
I/O
RTC/TMU
clock
MD8/5765 I/O
MD7/TXD I/O
Mode/SCIF data MD8
control (576)
5765
5765
5765
5765
5765
Mode/SCI data MD7
output
TXD
TXD
TXD
TXD
TXD
Rev. 6.0, 07/02, page 28 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
