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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Bits 11 to 8—Resource Select 3 to 0 (RS3–RS0): These bits specify the transfer request source.  
Bit 11: Bit 10: Bit 9: Bit 8:  
RS3  
RS2  
RS1  
RS0  
Description  
*1 *4  
0
0
0
0
External request, dual address mode  
space external address space)  
(external address  
(Initial value)  
1
0
Setting prohibited  
1
0
External request, single address mode  
External address space external device  
External request, single address mode  
External device external address space  
*1 *3 *4  
*1 *3 *4  
1
1
0
1
0
Auto-request (external address space external address  
2
*
space)  
Auto-request (external address space on-chip peripheral  
2
*
module)  
1
0
Auto-request (on-chip peripheral module external address  
2
*
space)  
1
0
Setting prohibited  
1
0
SCI transmit-data-empty interrupt transfer request  
(external address space SCTDR1)  
2
*
1
0
1
0
1
0
1
SCI receive-data-full interrupt transfer request  
2
*
(SCRDR1 external address space)  
1
0
1
SCIF transmit-data-empty interrupt transfer request  
2
*
(external address space SCFTDR2)  
SCIF receive-data-full interrupt transfer request  
2
*
(SCFRDR2 external address space)  
1
TMU channel 2 (input capture interrupt, external address space  
2
*
external address space)  
TMU channel 2 (input capture interrupt, external address space  
2
*
on-chip peripheral module)  
TMU channel 2 (input capture interrupt, on-chip peripheral  
2
*
module external address space)  
Setting prohibited  
Notes: *1 External request specifications are valid only for channels 0 and 1. Requests are not  
accepted for channels 2 and 3 in normal DMA mode.  
*2 Dual address mode  
*3 In DDT mode, selection is possible with the DTR format [60] (R/W bit) and [57-56]  
(MD1, MD0 bits) specification for channel 0 only.  
*4 In DDT mode:  
[SH7750] An external request specification should be set for channels 1 to 3. For  
channel 0, only single address mode can be set with the DTR format.  
[SH7750S] An external request specification can be set for channels 0 to 3.  
Rev. 6.0, 07/02, page 504 of 986  
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