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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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13.2.7 Wait Control Register 3 (WCR3)  
Wait control register 3 (WCR3) is a 32-bit readable/writable register that specifies the cycles  
inserted in the setup time from the address until assertion of the write strobe, and the data hold  
time from negation of the strobe, for each area. This enables low-speed memory to be connected  
without using external circuitry.  
WCR3 is initialized to H'07777777 by a power-on reset, but is not initialized by a manual reset or  
in standby mode.  
Bit:  
Bit name:  
Initial value:  
R/W:  
31  
0
30  
0
29  
0
28  
0
27  
0
26  
A6S0  
1
25  
A6H1  
1
24  
A6H0  
1
R
R
R
R
R
R/W  
R/W  
R/W  
Bit:  
Bit name:  
Initial value:  
R/W:  
23  
0
22  
A5S0  
1
21  
A5H1  
1
20  
19  
18  
17  
A4H1  
1
16  
A4H0  
1
A5H0 A4RDH* A4S0  
1
0
1
R
R/W  
R/W  
R/W  
R/W*  
R/W  
R/W  
R/W  
Bit:  
Bit name:  
Initial value:  
R/W:  
15  
0
14  
A3S0  
1
13  
A3H1  
1
12  
A3H0  
1
11  
0
10  
A2S0  
1
9
A2H1  
1
8
A2H0  
1
R
R/W  
R/W  
R/W  
R
R/W  
R/W  
R/W  
Bit:  
7
6
5
A1H1  
1
4
A0H0  
1
3
0
2
A0S0  
1
1
A0H1  
1
0
A0H0  
1
Bit name: A1RDH* A1S0  
Initial value:  
R/W: R/W*  
Note: * SH7750R only  
0
1
R/W  
R/W  
R/W  
R
R/W  
R/W  
R/W  
Bits 31 to 27, 23, 19*, 15, 11, 7*, and 3—Reserved: These bits are always read as 0, and should  
only be written with 0.  
Note: * SH7750R only  
Rev. 6.0, 07/02, page 351 of 986  
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