Data Sheet
HY[B/E]18M1G16[0/1]BF
1-Gbit DDR Mobile-RAM
FIGURE 24
WRITE Burst (min. and max. tDQSS
)
CK
CK
Command
WRITE
NOP
NOP
NOP
NOP
NOP
Address
BA,Col b
tDQSSmin
DQS
DQ
Di b
DM
tDQSSmax
DQS
DQ
Di b
DM
DI b = Data In to column b.
3 subsequent elements of Data In are applied in the programmed order following DI b.
A non-interrupted burst of 4 is shown.
= Don't Care
A10 is LOW with the WRITE command (Auto Precharge is disabled)
Data for any WRITE burst may be concatenated with or truncated with a subsequent WRITE command. In either case, a
continuous flow of input data can be maintained. The new WRITE command can be issued on any clock cycle following the
previous WRITE command. The first data element from the new burst is applied after either the last element of a completed
burst or the last desired data element of a longer burst which is being truncated. The new WRITE command should be issued
x clock cycles after the first WRITE command, where x equals the number of desired data element pairs (pairs are required by
the 2n pre fetch architecture).
Figure 25 shows concatenated WRITE bursts of 4.
Rev.1.0, 2007-03
34
10242006-Y557-TZXW
QIMONDA [ QIMONDA AG ]
