Internet Data Sheet
HYB18T512161B2F–20/25
512-Mbit Double-Data-Rate-Two SDRAM
3
Functional Description
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TABLE 6
Mode Register Definition (BA[1:0] = 00B)
Field
Bits
Type1)
Description
Bank Address [1]
0B BA1 Bank Address
Bank Address [0]
0B BA0 Bank Address
Active Power-Down Mode Select
BA1
14
reg. addr.
BA0
PD
13
12
w
w
0B
1B
PD Fast exit
PD Slow exit
WR
[11:9]
Write Recovery2)
Note: All other bit combinations are illegal.
001B WR 2
010B WR 3
011B WR 4
100B WR 5
101B WR 6
110B WR 7
DLL
TM
CL
8
w
w
w
DLL Reset
0B
1B
DLL No
DLL Yes
7
Test Mode
0B
1B
TM Normal Mode
TM Vendor specific test mode
[6:4]
CAS Latency
Note: All other bit combinations are illegal.
010B CL reserved
011B CL 3
100B CL 4
101B CL 5
110B CL 6
111B CL 7
Rev. 1.1, 2007-06
10
05152007-ZYAH-ACMZ
Date: 2008-02-26
QIMONDA [ QIMONDA AG ]
