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HYB18H512321AFL20 参数 Datasheet PDF下载

HYB18H512321AFL20图片预览
型号: HYB18H512321AFL20
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 16MX32, 0.35ns, CMOS, PBGA136]
分类和应用: 动态存储器双倍数据速率内存集成电路
文件页数/大小: 100 页 / 1884 K
品牌: QIMONDA [ QIMONDA AG ]
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HYB18H512321AF  
512-Mbit GDDR3  
Electrical Characteristics  
Table 38  
Timing Parameters (HYB18H512321AF–12/14/16/20)  
Parameter  
CAS  
latency  
Symbol  
Limit Values  
–16  
Unit  
–20  
–12  
–14  
min max min max min max min  
max  
0.16  
0.16  
0.40  
0.18  
0.18  
0.40  
0.20  
0.20  
0.40  
0.24  
0.24  
0.40  
Data-in and Data Mask to  
WDQS Setup Time  
Data-in and Data Mask to  
WDQS Hold Time  
Data-in and DM input pulse  
width (each input)  
tDS  
ns  
ns  
tCK  
tDH  
tDIPW  
0.40  
0.40  
0.75  
0.75  
9
0.40  
0.40  
0.75  
0.75  
8
0.40  
0.40  
0.75  
0.75  
7
0.40  
0.40  
0.75  
0.75  
6
DQS input low pulse width  
DQS input high pulse width  
DQS Write Preamble Time  
DQS Write Postamble Time  
Write Recovery Time  
tDQSL  
tDQSH  
tWPRE  
tWPST  
tWR  
tCK  
tCK  
tCK  
tCK  
tCK  
1.25  
1.25  
1.25  
1.25  
1.25  
1.25  
1.25  
1.25  
7)  
Read Cycle Timing Parameters for Data and Data Strobe  
-0.22 0.22 –0.25 0.25  
–0.28 0.28  
–0.35 0.35  
Data Access Time from Clock tAC  
ns  
tCK  
tCK  
ns  
0.75  
0.75  
1.25  
1.25  
0.75  
0.75  
1.25  
1.25  
0.75  
0.75  
1.25  
1.25  
0.75  
0.75  
1.25  
1.25  
Read Preamble  
Read Postamble  
tRPRE  
tRPST  
tACmin tACmax tACmin tACmax tACmin tACmax tACmin tACmax  
tACmin tACmax tACmin tACmax tACmin tACmax tACmin tACmax  
-0.22 0.22 –0.25 0.25 –0.28 0.28 –0.35 0.35  
Data-out high impedance time tHZ  
from CLK  
Data-out low impedance time tLZ  
ns  
from CLK  
DQS edge to Clock edge skew tDQSCK  
ns  
ns  
9)  
0.140  
0.160  
0.180  
0.225  
DQS edge to output data edge tDQSQ  
skew  
0.140  
0.160  
0.180  
0.225  
Data hold skew factor  
Data output hold time from  
DQS  
tQHS  
tQH  
ns  
ns  
tHPtQHS  
tHPtQHS  
tHPtQHS  
tHPtQHS  
Refresh/Power Down Timing  
Refresh Period (8192 cycles) tREF  
32  
32  
32  
32  
ms  
µs  
3.9  
3.9  
3.9  
3.9  
Average periodic Auto Refresh tREFI  
interval  
52.0  
52.0  
52.8  
54  
Delay from AREF to next ACT/ tRFC  
ns  
AREF  
1000  
7
1000  
6
1000  
5
1000  
4
Self Refresh Exit time  
tXSC  
tXPN  
tCK  
tCK  
Power Down Exit time  
Other Timing Parameters  
RES to CKE setup timing  
RES to CKE hold timing  
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
tATS  
tATH  
ns  
ns  
ns  
Termination update Keep Out tKO  
timing  
Data Sheet  
93  
Rev. 1.73, 2005-08  
05122004-B1L1-JEN8  
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