HYB18H512321AF
512-Mbit GDDR3
Electrical Characteristics
3. Definitions for IDD :
LOW is defined as VIN = 0.4 × VDDQ; HIGH is defined as VIN = VDDQ
TABLE is defined as inputs are stable at a HIGH level.
;
SWITCHING is defined as inputs are changing between HIGH and LOW every clock cycle for address and
control signals, and inputs changing 50% of each data transfer for DQ signals.
4. Legend: A=Active; RA=Read with Autoprecharge; D=DESELECT.
Data Sheet
91
Rev. 1.73, 2005-08
05122004-B1L1-JEN8