HYB18H512321AF
512-Mbit GDDR3
Functional Description
4.14
DLL Off Mode
For very low frequency operations between 100 MHz and 350 MHz the DLL off mode is supported. Entering this
mode requires an Extended Mode Register Set command disabling the DLL by setting A0 to 1. For 350 MHz clock
speed and faster DLL on mode operation is recommended.
Most of the commands and timings described in Chapter 4.5 to Chapter 4.13 are also applicable for DLL off
mode. Differences exist for the frequency range, the initialization and the timing of WR command and RD
command.
4.14.1
Frequency range in DLL off mode
Operations in DLL off mode are limited to the frequencies between 100 MHz and 350 MHz.
Table 22
DLL off: General Timing Parameter for –16 and –20 speed sorts
Parameter
Read
Latency
Symbol
Limit Values
-16
Unit
Note
-20
min
max
min
max
Clock DLL off mode
System Frequency
9
8
7
fCK9
fCK8
fCK7
100
100
100
350
350
350
100
100
100
350
350
350
MHz
MHz
MHz
4.14.2
Initialization in DLL off mode
VDD
VDDQ
VREF
tATS tATH
RES
CKE
CLK#
CLK
ARF
Com.
A6
DES
DES
PA
EMR
MRS
PA
ARF
A.C.
tRFC
min. 300 cycles
tRFC
tRP
tMRD
tMRD
tRP
min. 700 cycles
min. 200 µs
VDD and
CLK stable
PA: PREALL command
MRS: MRS command
EMR: EMRS command
DES : Deselect
ARF: AUTO REFRESH command
A.C.: Any command
Don't Care
Figure 60 DLL off: Power Up Sequence
Data Sheet
74
Rev. 1.73, 2005-08
05122004-B1L1-JEN8
QIMONDA [ QIMONDA AG ]
