HYB18H512321AF
512-Mbit GDDR3
Functional Description
4.11
Self-Refresh
4.11.1
Self-Refresh Entry (SREFEN)
The Self-Refresh mode can be used to retain data in
the GDDR3 Graphics RAM even if the rest of the
system is powered down. When in the Self-Refresh
mode, the GDDR3 Graphics RAM retains data without
external clocking. The Self-Refresh command is
initiated like an Auto-Refresh command except CKE is
disabled (LOW). Self Refresh Entry is only possible if all
banks are precharged and tRP is met.
The GDDR3 Graphics RAM has a build-in timer to
accomodate Self-Refresh operation. The Self-Refresh
command is defined by having CS, RAS, CAS and CKE
held low with WE high at the rising edge of the clock.
Once the command is registered, CKE must be held
LOW to keep the device in Self-Refresh mode. When
the has entered the Self-Refresh mode, all external
control signals, except CKE are disabled. The address,
command and data terminators remain on. The DLL
and the clock are internally disabled to save power. The
user may halt the external clock while the device is in
Self-Refresh mode the next clock after Self-Refresh
entry, however the clock must be restarted before the
device can exit Self-Refresh operation.
CLK#
CLK
CKE
CS#
RAS#
CAS#
WE#
A0-A7
A9-A11
A8
BA0-BA2
Don't Care
Figure 54 Self-Refresh Entry Command
CLK#
CLK
AREF
Command
CKE
PA
1 Clock
tRP
CLK/CLK#
may be halted
PA.: Precharge ALL Command
(or last of PREs to each bank)
SRF: Self Refresh Command
Don't Care
Figure 55 Self Refresh Entry
Data Sheet
71
Rev. 1.73, 2005-08
05122004-B1L1-JEN8
QIMONDA [ QIMONDA AG ]
