November 2006
PCS5I9658
rev 0.3
Table 5: DC Characteristics (VCC = 3.3V ± 5%, TA = -40°C to +85°C)
Symbol
VIH
Characteristics
Min
2.0
Typ
Max
VCC +0.3
0.8
Unit
V
V
Condition
LVCMOS
LVCMOS
Input high voltage
VIL
Input low voltage
Peak-to-peak input voltage
VPP
250
mV
LVPECL
(PCLK)
Common Mode Range
(PCLK)
Output High Voltage
Output Low Voltage3
1
VCMR
1.0
2.4
VCC-0.6
V
V
LVPECL
VOH
VOL
IOH=-24 mA2
IOL=24mA
0.55
0.30
V
V
I
OL=12mA
ZOUT
IIN
ICC_PLL
ICCQ
Output impedance
14 -17
Ω
Input Current4
±200
15
15
µA
mA
mA
VIN=VCC or GND
VCC_PLL Pin
All VCC Pins
Maximum PLL Supply Current
Maximum Quiescent Supply Current
12
13
Note: 1. VCMR (DC) is the cross point of the differential input signal. Functional operation is obtained ,when the crosspoint is within the VCMR
range and the input swing lies within the VPP (DC) specification.
2.The PCS5I9658 is capable of driving 50Ωtransmission lines on the incident edge. Each output drives one 50Ωparallel terminated
transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50Ωseries terminated transmission lines.
3.The PCS5I9658 output levels are compatible to the MPC958 output levels.
4.Inputs have pull-down or pull-up resistors affecting the input current.
3.3V 1:10 LVCMOS PLL Clock Generator
5 of 15
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
