PM7385 FREEDM-84A672
DATA SHEET
PMC-1990114
ISSUE 6
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER
WITH ANY-PHY PACKET INTERFACE
Pin Name
APL
Type
Pin
No.
Function
Tristat AC2
The SBI ADD bus payload signal (APL)
indicates valid data within the SBI TDM bus
structure. This signal is asserted during all
octets making up a tributary. This signal may
be asserted during the V3 or H3 octet within a
tributary to accommodate negative timing
adjustments between the tributary rate and
the fixed TDM bus structure. This signal may
be deasserted during the octet following the
V3 or H3 octet within a tributary to
e
Output
accommodate positive timing adjustments
between the tributary rate and the fixed TDM
bus structure.
Multiple link layer devices can drive this
signal at uniquely assigned tributary column
positions. APL is tristated when the
FREEDM-84A672 is not outputting data on a
particular tributary column.
APL is updated on the rising edge of
REFCLK.
AV5
Tristat AB4
The SBI ADD bus payload indicator signal
(AV5) locates the position of the floating
payloads for each tributary within the SBI
TDM bus structure. Timing differences
between the port timing and the TDM bus
timing are indicated by adjustments of this
payload indicator relative to the fixed TDM
bus structure.
e
output
Multiple link layer devices can drive this
signal at uniquely assigned tributary column
positions. AV5 is tristated when the
FREEDM-84A672 is not outputting data on a
particular tributary column.
AV5 is updated on the rising edge of
REFCLK.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
14
PMC [ PMC-SIERRA, INC ]
