PM7385 FREEDM-84A672
DATA SHEET
PMC-1990114
ISSUE 6
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER
WITH ANY-PHY PACKET INTERFACE
Pin Name
Type
Pin
No.
Function
C1FPOUT
Output AA4
The C1 octet frame pulse output signal
(C1FPOUT) may be used to provide frame
synchronisation for devices interconnected
via an SBI interface. C1FPOUT is asserted
for 1 REFCLK cycle every 500 µs (i.e. every
9720 REFCLK cycles). If C1FPOUT is used
for synchronisation, it must be connected to
the C1FP inputs of all the devices connected
to the SBI interface.
C1FPOUT is updated on the rising edge of
REFCLK.
Note – The C1FPOUT pulse generated by
FREEDM-84A672 is not suitable for use in
systems in which the SBI bus is operated in
synchronous mode [Ref. 3].
DDATA[0]
DDATA[1]
DDATA[2]
DDATA[3]
DDATA[4]
DDATA[5]
DDATA[6]
DDATA[7]
Input
Input
AE6
AC8
AD8
AE8
AC10
AE9
AF9
The SBI DROP bus data signals
(DDATA[7:0]) contain the time division
multiplexed receive data from the up to 84
independently timed links. Data from each
link is transported as a tributary within the SBI
TDM bus structure. Multiple PHY devices
can drive the SBI DROP bus at uniquely
assigned tributary column positions.
AE10
DDATA[7:0] are sampled on the rising edge of
REFCLK.
DDP
AC6
The SBI DROP bus parity signal (DDP)
carries the even or odd parity for the DROP
bus signals. The parity calculation
encompasses the DDATA[7:0], DPL and DV5
signals.
Multiple PHY devices can drive DDP at
uniquely assigned tributary column positions.
This parity signal is intended to detect
accidental PHY source clashes in the column
assignment.
DDP is sampled on the rising edge of
REFCLK.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
11
PMC [ PMC-SIERRA, INC ]
