PM7385 FREEDM-84A672
DATA SHEET
PMC-1990114
ISSUE 6
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER
WITH ANY-PHY PACKET INTERFACE
Pin Name
DPL
Type
Input
Pin
No.
AD1
Function
The SBI DROP bus payload signal (DPL)
indicates valid data within the SBI TDM bus
structure. This signal is asserted during all
octets making up a tributary. This signal may
be asserted during the V3 or H3 octet within a
tributary to accommodate negative timing
adjustments between the tributary rate and
the fixed TDM bus structure. This signal may
be deasserted during the octet following the
V3 or H3 octet within a tributary to
accommodate positive timing adjustments
between the tributary rate and the fixed TDM
bus structure.
Multiple PHY devices can drive DPL at
uniquely assigned tributary column positions.
DPL is sampled on the rising edge of
REFCLK.
DV5
Input
AE4
The SBI DROP bus payload indicator signal
(DV5) locates the position of the floating
payloads for each tributary within the SBI
TDM bus structure. Timing differences
between the port timing and the TDM bus
timing are indicated by adjustments of this
payload indicator relative to the fixed TDM
bus structure.
Multiple PHY devices can drive DV5 at
uniquely assigned tributary column positions.
All movements indicated by this signal must
be accompanied by appropriate adjustments
in the DPL signal.
DV5 is sampled on the rising edge of
REFCLK.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
12
PMC [ PMC-SIERRA, INC ]
