RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
Figure 4 Data Flow and Buffering in the UI and the A1SP Blocks
UI
A1SP
TUFIFO
(4 cells)
TXA1SP
(8 cell FIFO)
3 Cell FIFO
3 Cell FIFO
RXA1SP
(8 cell FIFO)
RUFIFO
(8 cells)
In UTOPIA Level Two mode, the AAL1gator-8 responds on the UTOPIA bus as a
single port device.
For UTOPIA to UTOPIA loopback, there is a 3-cell FIFO in the UI Block. Line-
side to Line-side loopback is done in the A1SP Block.
The UI_EN bit in the UI_COMN_CFG register enables both the source side and
sink side UTOPIA interface. This bit resets to the disabled state so that the chip
resets with all UTOPIA outputs tristated. Once the modes have been configured
and the interface enabled, then the outputs will drive to their correct values.
The UI block consists of 7 functions: UI Data Source Interface (SRC_INTF), UI
Data Sink Interface(SNK_INTF), 8-cell FIFO (FF8CELL), 4-cell FIFO (FF4CELL),
3-cell FIFO (FF3CELL), UMUX, and UI_REG. See Figure 5 for the block
diagram of the AAL1_UI block.
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PMC [ PMC-SIERRA, INC ]
