RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
Notes on Pin Description:
• All AAL1gator-8 inputs and bi-directionals present minimum capacitive
loading and are 5V tolerant.
• The AAL1gator-8 UTOPIA/Any-PHY outputs and bi-directional pins
have 8 mA drive capability. TDO has a 4 mA drive capability. Any other
outputs and bi-directional pins have 6 mA drive capability.
• All AAL1gator-8 outputs can be tristated under control of the IEEE
P1149.1 test access port, even those which do not tristate under
normal operation. All outputs and bi-directionals are 5 V tolerant when
tristated.
• All clock inputs (except TL_CLK) are Schmitt triggered. Inputs
RPHY_ADD[4]/RSX, RL_DATA[7:0], RPHY_ADDR[3:0],
TPHY_ADDR[4:0], RL_CLK[7:0], RL_SYNC[3:1], TL_CLK[7:0],
RATM_DATA[15:0], RATM_PAR, RATM_CLK, RATM_SOC,
TATM_CLK, D[15:0], RAM_PAR[1:0], WRB, CSB, RDB, NCLK,
CRL_CLK, CTL_CLK, SCAN_ENB, SCAN_MODEB, CGC_SER_D,
CGC_VALID, RSTB, ALE, TL_CLK_OE, TMS, TCLK, TDI and TRSTB
have internal pull-up resistors.
• Power to the VDD3.3 pins should be applied before power to the
VDD2.5 pins is applied. Similarly, power to the VDD2.5 pins should be
removed before power to the VDD3.3 pins is removed.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
63
PMC [ PMC-SIERRA, INC ]
