RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
General Signals(3+power/gnd)
Pin Name
Type
Pin No.
Function
RSTB
Schmitt AA21
Trigger
Input
Reset is an active low asynchronous
hardware reset. When RSTB is forced low,
all of the AAL1gator’s internal registers are
reset to their default states.
Internal
Pull-up
SYS_CLK
Input
A2
System Clock. The maximum frequency is
45 MHz. This clock is used to clock the
majority of the logic inside the chip and also
determines the speed of the memory
interface and the external clock control
interface. This clock is also used for clock
synthesis. When clock synthesis is enabled
this clock must be 38.88 MHz.
VDD3.3
Power
E1
L1
R4
W4
V2
Power (VDD3.3). The VDD3.3 pins should
be connected to a well decoupled +3.3V DC
power supply. These pins power the output
ports of the device. PQH pins are “quiet”
power pads.
(PPH, PQH)
Y5
W8
W16
AB17
Y18
Y20
R21
L19
F20
A22
A18
D16
D11
D4
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
61
PMC [ PMC-SIERRA, INC ]
