RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
congestion, which is impacting the UTOPIA interface and the TALP_FIFO_FULL
bit will go active in A1SP_INTR_REG. When the TALP FIFO fills, then TALP is
no longer able to build cells and data will start building up in the transmit buffer
and the frame_advance_fifo will fill. If this continues so that the
FR_ADV_FIFO_FULL bit goes active then data has been lost and the transmit
queues need to be reset. The T_UTOP_FULL indicator can be used to
determine when the UTOPIA Interface clears. It may also be desirable to disable
UI_EN so that the stored cells can be flushed.
The SRC_INTF circuit controls when a cell is transmitted from the internal 4 cell
FIFO. Since the UTOPIA can transmit cells at higher speeds than the TALP, and
since it is expected to see applications in a shared UTOPIA environment, cell
transmission from the SRC_INTF commences only when there is a full cell worth
of data available to transmit. The cell is then transmitted to the interface at the
UTOPIA TATM_CLK rate, in accordance with the TATM_FULLB/RPHY_ENB)
input. The maximum supported clock rate is 52 MHz.
9.1.1.1 Any-PHY Mode
If ANY-PHY_EN is set in the UI_SRC_CFG register then the SRC_INTF operates
as a single port Any-PHY slave device. In Any-PHY mode the RPHY_ADDR(4)
pin becomes the RSX pin and depending on the value of CS_MODE_EN, the
RPHY_ADDR(3) pin may become the RCSB signal instead.
In Any-PHY mode in-band addressing is used to allow more than the 32 possible
addresses available in UTOPIA mode. One extra word is prepended to the front
of each cell that is transmitted. The prepended word indicates the port address
sending the cell. The SRC_INTF uses CFG_ADDR(15:0) in the
UI_SRC_ADD_CFG register for the address prepend. If 16_BIT_MODE is low
then only the lower 8 bits are used.
During the cycle that the prepend address is active on the bus, RSX pulses high.
Because of the large number of possible ports, in the source direction, device
addresses are used for polling and device selection, instead of port addresses.
(Each device may control many ports) When a device is selected to send a cell,
the PHY device prepends the port address in front of the cell. Since, in this
direction the AAL1gator-8 is only a single port, the device address and port
address are the same. However, the AAL1gator-8 has only a limited number of
address pins. To accommodate systems, which are using a mix of different port
density Any-PHY devices, the RCSB signal is available to handle any additional
external decoding that is required. In Any-PHY mode, PHY devices respond with
RPHY_CLAV 2 cycles after their address is on the bus instead of the one cycle
required in UTOPIA mode. However, the timing of RCSB matches UTOPIA
timing so that a full cycle for external decoding is available.
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL
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