PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Figure 12
-TransmitTiming Options
FIFO output
data clock
TCLKO
FIFO input
data clock
DJAT
FIFO
BTXCLK
BTCLK
0
1
0
1
OCLKSEL1
OCLKSEL0
1
0
Smooth 2.048MHz
0
00
"Jitter-free"
2.048MHz
1
DJAT
PLL
01
SMCLKO
Smooth
16.384
MHz
0
PLLREF[1:0]
10
"Jitter-free"
16.384MHz
RCLKO
TCLKI
24x Reference
for Jitter Atten.
1
11
8
÷
0
1
XCLK
(49.152MHz or
TCLKISEL
16.384MHz)
0
1
"High-speed" clock for CDRC
(=16.384MHz)
XCLKSEL
0
1
"High-speed" clock for ELST,
2
÷
HSBPSEL
SIGX & TPSC
( 6x max
≥
backplane clockrate)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
89
PMC [ PMC-SIERRA, INC ]
