PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Register 0AH: E1XC Master Diagnostics
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
PAYLB
LINELB
DMLB
X
X
0
0
0
0
X
X
R/W
R/W
R/W
R/W
DDLB
Unused
Unused
This register allows software to enable the diagnostic mode of the E1XC.
PAYLB:
The PAYLB bit selects the payload loopback mode, where the received data
output from the ELST is internally connected to the transmit data input of the
TRAN. The data read out of ELST is timed to the transmitter clock, and the
transmit frame alignment is used to synchronize the output frame alignment
of ELST. During payload loopback, the data output on BRPCM is forced to
logic 1. When PAYLB is set to logic 1, the payload loopback mode is enabled.
When PAYLB is set to logic 0, the loopback mode is disabled.
LINELB:
The LINELB bit selects the line loopback mode, where the recovered positive
and negative pulse outputs from the CDRC block are internally connected to
the digital inputs of the DJAT block. When LINELB is set to logic 1, the line
loopback mode is enabled. When LINELB is set to logic 0, the line loopback
mode is disabled. Note that when line loopback is enabled, the BTXCLK bit in
register 05H must be set to logic 1 to select the RCLKO clock as the transmit
clock source and the Timing Options Register settings should be reviewed to
ensure the options are such that data will pass error-free and "jitter"-free
through DJAT (typically, the default setting, 00H, for register 7 will be
appropriate for line loopback).
DDLB:
The DDLB bit selects the diagnostic digital loopback mode, where the digital
positive and negative RZ pulse outputs from DJAT are internally connected to
the receive positive and negative pulse inputs of CDRC. When DDLB is set to
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93
PMC [ PMC-SIERRA, INC ]
