PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
InputTransmit Bit Settings
Data
XCLK Freq
Effect on Output
Transmit Data
Backplane
transmit data
timed to
HSBPSEL =0
XCLKSEL =0
OCLKSEL1 =1
OCLKSEL0 =X
49.152MHz
No jitter
attenuation.
TCLKO is equal
to internal
transmit clock,
either BTCLK,
gapped BTCLK,
or RCLKO.
BTCLK.
PLLREF1
PLLREF0
=X
=X
TCLKISEL =0
SMCLKO =0
XCLKSEL =1
TCLKISEL =1
16.384MHz
Same as above.
These modes are
only compatible
with the digital
transmit outputs.
Do not use the
analog pulse
SMCLKO
=1
DJAT SYNC =0
transmitter for
these register bit
combinations.
Backplane
transmit data
timed to
HSBPSEL =0
XCLKSEL =0
OCLKSEL1 =0
OCLKSEL0 =1
49.152MHz
No jitter
attenuation.
TCLKO is equal
to TCLKI (useful
for higher rate
MUX
BTCLK.
PLLREF1
PLLREF0
=X
=X
applications).
TCLKISEL =0
SMCLKO =0
XCLKSEL =1
TCLKISEL =1
16.384MHz
Same as above.
SMCLKO
=1
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
87
PMC [ PMC-SIERRA, INC ]
