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PM4328-PI 参数 Datasheet PDF下载

PM4328-PI图片预览
型号: PM4328-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度T1 / E1成帧器,集成M13多路复用器 [HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER]
分类和应用: 复用器数字传输控制器电信集成电路电信电路异步传输模式ATM
文件页数/大小: 250 页 / 1399 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4328 TECT3  
DATASHEET  
PMC-2011596  
ISSUE 1  
HIGH DENSITY T1/E1 FRAMER  
AND M13 MULTIPLEXER  
Figure 59: Egress 8.192 Mbps H-MVIP Link Timing  
CMV8MCLK  
(16 MHz)  
CMVFPC  
(4 MHz)  
CMVFPB  
MVED[x]  
CASED[x]  
CCSED  
B8  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
B1  
TS 1  
TS 127  
TS 0  
13.6 Ingress H-MVIP Link Timing  
The timing relationship of the common 8M H-MVIP clock, CMV8MCLK, frame  
pulse clock, CMVFPC, data, MVID[x], CASID[x] or CCSID, and frame pulse,  
CMVFPB, signals of a link configured for 8.192 Mbps H-MVIP operation with a  
type 0 frame pulse is shown in Figure 60. The falling edges of each CMVFPC  
are aligned to a falling edge of the corresponding CMV8MCLK for 8.192 Mbps H-  
MVIP operation. The TECT3 samples CMVFPB low on the falling edge of  
CMVFPC and references this point as the start of the next frame. The TECT3  
updates the data provided on MVID[x], CASID[x] and CCSID on every second  
falling edge of CMV8MCLK as indicated for bit 2 (B2) of time-slot 1 (TS 1) in  
Figure 60. The first bit of the next frame is updated on MVID[x], CASID[x] and  
CCSID on the falling CMV8MCLK clock edge for which CMVFPB is also sampled  
low. B1 is the most significant bit and B8 is the least significant bit of each octet.  
Figure 60: Ingress 8.192 Mbps H-MVIP Link Timing  
CMV8MCLK  
(16 MHz)  
CMVFPC  
(4 MHz)  
CMVFPB  
MVID[x]  
CASID[x]  
CCSID  
B8  
B1  
B2  
B3  
B4  
TS 0  
B5  
B6  
B7  
B8  
B1  
TS 1  
TS 127  
PROPRIETARY AND CONFIDENTIAL  
189