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PM4328-PI 参数 Datasheet PDF下载

PM4328-PI图片预览
型号: PM4328-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度T1 / E1成帧器,集成M13多路复用器 [HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER]
分类和应用: 复用器数字传输控制器电信集成电路电信电路异步传输模式ATM
文件页数/大小: 250 页 / 1399 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4328 TECT3  
DATASHEET  
PMC-2011596  
ISSUE 1  
HIGH DENSITY T1/E1 FRAMER  
AND M13 MULTIPLEXER  
13.3 SBI DROP Bus Interface Timing  
Figure 56: SBI DROP Bus T1 Functional Timing  
SREFCLK  
SSS  
SC1FP  
SSS  
SDDATA[7:0]  
SDPL  
C1  
V3  
V3  
V3 DS0#4. V5 DS0#9.  
SSS  
SSS  
SSS  
SSS  
SSS  
SDV5  
SDDP  
SBIACT  
Figure 56 illustrates the operation of the SBI DROP Bus, using a negative  
justification on the second to last V3 octet as an example. The justification is  
indicated by asserting SDPL high during the V3 octet. The timing diagram also  
shows the location of one of the tributaries by asserting SDV5 high during the V5  
octet. The SBIACT signal is shown for the case in which TECT3 is driving  
SPE#1 onto the SBI DROP bus.  
Figure 57: SBI DROP Bus DS3 Functional Timing  
SREFCLK  
SSS  
SC1FP  
SSS  
DS-3 #1 DS-3 #2 DS-3 #3DS-3 #1  
SDDATA[7:0  
SDPL  
C1  
H3  
H3  
H3  
SSS  
SSS  
SSS  
SSS  
SSS  
]
SDV5  
SDDP  
SBIACT  
Figure 57 shows three DS-3 tributaries mapped onto the SBI bus. A negative  
justification is shown for DS-3 #2 during the H3 octet with SDPL asserted high. A  
positive justification is shown for DS-3#1 during the first DS-3#1 octet after H3  
which has SDPL asserted low. The SBIACT signal is shown for the case in  
which TECT3 is driving SPE#2 (DS-3#2) onto the SBI DROP bus.  
PROPRIETARY AND CONFIDENTIAL  
187