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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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Reset and Initialization  
PLX Technology, Inc.  
5.3.1  
5.3.2  
Selecting Configuration Values Using Serial EEPROM  
Configuration values, for the registers defined in Section 11.6, “Configuration Header Registers,” can be  
changed using the serial EEPROM, with the exception of those fixed by the PCI Express Base r1.0a or  
not supported by the PEX 8532.  
Selecting Upstream Port Using Serial EEPROM  
The Debug Control register Upstream Port Number field (offset 1DCh[11:8]) values defined in  
Table 5-1 determine the upstream port selection.  
Table 5-1. Debug Control Register Upstream Port Number Field (Offset 1DCh[11:8]) Values  
Station 0  
0h = Port 0  
Station 1  
8h = Port 8  
1h = Port 1  
9h = Port 9  
2h = Port 2  
Ah = Port 10  
Bh = Port 11  
Ch to Fh = Reserved  
3h = Port 3  
4h to 7h = Reserved  
76  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
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