February, 2007
PEX 8532 Functional Blocks
4.3.1.3
Transaction Layer
The upper layer of the architecture is the Transaction Layer. The Transaction Layer’s primary
responsibility is the assembly and disassembly of Transaction Layer Packets (TLPs). TLPs are used to
communicate transactions, such as Read and Write, as well as certain types of events. The Transaction
Layer is also responsible for managing credit-based flow control for TLPs.
Request packets requiring a Response packet are implemented as Split Transactions. Each packet
contains a unique identifier that enables Response packets to be directed to the correct originator.
The packet format supports different forms of addressing, depending on the transaction type – Memory,
I/O, Configuration, or Message. The packets can also have attributes, such as No Snoop and
Relaxed Ordering.
The Transaction Layer supports four Address spaces – it includes the three PCI Address spaces
(Memory, I/O, and Configuration) and adds a Message space. (Refer to Table 4-2.) This specification
uses Message space to support all prior sideband signals, such as interrupts and Power Management
requests, as in-band Message transactions. PCI Express Message transactions are considered virtual
wires, because their effect is to eliminate the wide array of sideband signals currently used in a platform.
Functions provided by the Transaction Layer include:
• Decoding and checking incoming TLP
• Memory-mapped CSR access
• Checking the incoming packets for malformed packets or Unsupported Requests (UR)
• ECRC checking the incoming packets
• Error signaling for incoming packets
• Destination lookup and TC-VC mapping
• Virtual Channel Management
• TLP packet scheduling
• PCI/PCI-X-compatible ordering
• QoS support
• External Credit Control
• Power Management support
• Hot Plug support
• Message Signal Interrupt or INTx generation
• Ordering
• Egress and Ingress Credit Management
Table 4-2. Address Spaces Support Different Transaction Types
Address Space
Configuration
Input/Output
Memory
Transaction Types
Read/Write
Transaction Functions
Device configuration or setup.
Read/Write
Transfer data from/to an I/O-mapped location.
Transfer data from/to a memory location.
Read/Write
General-purpose messages.
Event signaling (such as status, interrupts, and so forth).
Message
Baseline/Virtual Wires
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
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