Functional Overview
PLX Technology, Inc.
4.3.2.3
No Snoop Enable – Silicon Revisions BA/BB/BC Only
In NT mode, the PEX 8532 provides a No Snoop Disable feature to force the No Snoop attribute bit in
the packet header to 0, for all packets transferred between the NT Link and Virtual Interfaces (across the
NT boundary, in both directions). This capability can be used to handle cache coherency-related issues
in a system. To enable this feature, set the Ingress Control register No Snoop Disable bit
(offset 660h[24]) to 1.
4.4
Non-Transparent Bridging Implementation
The PEX 8532 supports Non-Transparent (NT) bridge functionality, which is used to implement High-
Availability systems or Intelligent I/O modules using PCI Express technology. The following discusses
the basic Non-Transparent bridging concept, as it applies to a PCI Express system.
NT bridges allow systems to isolate address spaces by appearing as an endpoint to the Host.
An NT bridge exposes a Type 0 CSR header and forwards transactions from one domain to the other,
using address translation. An NT bridge is used to connect two independent address/host domains.
The NT bridge includes Doorbell registers for transmitting interrupts from one side of the bridge to the
other. The bridge also includes Scratchpad registers, accessible from both domains for inter-host
communication. The PEX 8532 PCI Express switch, with a single port configured to operate in
NT Bridge mode, supports two system models:
• Intelligent Adapter Mode
• Dual-Host Mode
The PEX 8532 switch initial operating mode is determined by the STRAP_MODE_SEL[1:0] balls.
The mode can later be changed by the serial EEPROM, by writing to the Debug Control register
Mode Select field.
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ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
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