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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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February, 2007  
Configuration Header Registers  
Register 11-16. 3Ch Bridge Control and Interrupt Signal (All Ports)  
Serial  
EEPROM  
Bit(s)  
Description  
Type  
Default  
Interrupt Line  
7:0  
RW  
Yes  
00h  
The PEX 8532 does not use this register, but provides it for operating  
system and device driver use.  
Interrupt Pin  
Identifies the Conventional PCI interrupt message(s) that the device  
(or device function) uses.  
When values = 01h, 02h, 03h, and 04h, maps to Conventional PCI  
interrupt messages for INTA#, INTB#, INTC#, and INTD#, respectively.  
15:8  
RO  
Yes  
01h  
When 00h, indicates that the device does not use Conventional PCI  
interrupt message(s).  
Only values 00h or 01h are allowed in the PEX 8532.  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
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