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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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February, 2007  
Configuration Header Registers  
Register 11-7. 18h Bus Number (All Ports)  
Serial  
EEPROM  
Bit(s)  
Description  
Type  
Default  
Primary Bus Number  
7:0  
RW  
Yes  
00h  
Records the Bus Number of the PCI Bus segment to which the primary  
interface of this port is connected. Set by Configuration software.  
Secondary Bus Number  
15:8  
RW  
Yes  
00h  
Records the Bus Number of the PCI Bus segment that is the secondary  
interface of this port. Set by Configuration software.  
Subordinate Bus Number  
23:16  
31:24  
RW  
RO  
Yes  
No  
00h  
00h  
Records the Bus Number of the highest numbered PCI Bus segment that  
is subordinate to this port. Set by Configuration software.  
Secondary Latency Timer  
Cleared to 00h, as required by the PCI Express Base r1.0a.  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
159  
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