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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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February, 2007  
PEX 8532 PCI Express Power Management Support  
Table 10-2. Supported PCI Express Power Management Capabilities (Cont.)  
Register  
Supported  
Description  
Offset  
Bit(s)  
Yes  
No  
Device Capabilities  
Endpoint L0s Acceptable Latency  
8:6  
Because the PEX 8532 is a switch and not an endpoint, it does not support this feature.  
000b = Disables the capability  
Endpoint L1 Acceptable Latency  
11:9  
Because the PEX 8532 is a switch and not an endpoint, it does not support this feature.  
000b = Disables the capability  
Attention Button Present (Upstream Port)  
For the PEX 8532 upstream port, value of 1 indicates that an Attention Button  
is implemented on that adapter board.  
12  
13  
The PEX 8532 Serial EEPROM register initialization capability is used to change this  
value to 0, indicating that an Attention Button is not present on an adapter board for  
which the PEX 8532 provides the system interface.  
Do not change for downstream ports.  
Attention Indicator Present (Upstream Port)  
For the PEX 8532 upstream port, value of 1 indicates that an Attention Indicator  
is implemented on the adapter board.  
The PEX 8532 Serial EEPROM register initialization capability is used to change this  
value to 0, indicating that an Attention Indicator is not present on an adapter board for  
which the PEX 8532 provides the system interface.  
Do not change for downstream ports.  
6Ch  
Power Indicator Present (Upstream Port)  
For the PEX 8532 upstream port, value of 1 indicates that a Power Indicator is  
implemented on the adapter board.  
14  
The PEX 8532 Serial EEPROM register initialization capability is used to change this  
value to 0, indicating that a Power Indicator is not present on an adapter board for  
which the PEX 8532 provides the system interface.  
Do not change for downstream ports.  
Captured Slot Power Limit Value (Upstream Port)  
For the PEX 8532 upstream port, the upper limit on power supplied by the slot is  
determined by multiplying the value in this field by the value in the Captured Slot  
Power Limit Scale field.  
25:18  
Do not change for downstream ports  
Captured Slot Power Limit Scale (Upstream Port)  
For the PEX 8532 upstream port, the upper limit on power supplied by the slot is  
determined by multiplying the value in this field by the value in the Captured Slot  
Power Limit Value field.  
00b = 1.0  
27:26  
01b = 0.1  
10b = 0.01  
11b = 0.001  
Do not change for downstream ports.  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
139  
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