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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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Power Management  
PLX Technology, Inc.  
Table 10-2. Supported PCI Express Power Management Capabilities (Cont.)  
Register  
Supported  
Description  
Offset  
Bit(s)  
Yes  
No  
Slot Status and Control (for Downstream Ports)  
Power Fault Detector Enable  
0 = Function is disabled  
1 = Enables software notification with a Hot Plug interrupt if the port is in the D0  
Power State (Power Management Status and Control register Power State field,  
offset 44h[1:0]=00b), or with a PME message if the port is in the D3hot state  
(offset 44h[1:0]=11b), for a Power Fault event on the corresponding PEX 8532  
downstream port.  
1
Do not change for upstream port.  
Power Indicator Control  
Controls the Power Indicator on the corresponding PEX 8532 downstream port slot.  
00b = Reserved – Writes are ignored  
01b = Turns On indicator to constant On state  
10b = Causes indicator to blink  
11b = Turns Off indicator  
9:8  
Software must use a Byte or Word Write (and not a DWord Write) to control the  
HP_PWRLEDx# Output signal.  
80h  
Reads return the corresponding PEX 8532 downstream port Power Indicator’s  
current state.  
Do not change for upstream port.  
Power Controller Control  
Controls the Power Controller on the corresponding PEX 8532 downstream port slot.  
0 = Turns On Power Controller; requires some delay to be effective  
1 = Turns Off Power Controller  
10  
17  
Software must use a Byte or Word Write (and not a DWord Write) to control the  
Power Controller Output signals.  
Note: Value of 0 requires some delay to be effective.  
Power Fault Detected  
Set to 1 when the Power Controller of the corresponding PEX 8532 downstream port  
slot detects a Power Fault at the slot.  
Do not change for upstream port.  
Power Budgeting Extended Capability  
Extended Capability ID  
15:0  
Set to 0004h, as required by the PCI Express Base r1.0a.  
Capability Version  
138h  
19:16  
Set to 1h, as required by the PCI Express Base r1.0a.  
Next Capability Offset  
31:20  
Set to 148h, which addresses the PEX 8532 Virtual Channel Extended Capability  
registers.  
Data Select  
Data Select  
Indexes the Power Budgeting Data reported by way of eight Power Budgeting Data  
registers per port and selects the DWord of Power Budgeting Data that appears in each  
Power Budgeting Data register. Index values start at 0, to select the first DWord of  
Power Budgeting Data; subsequent DWords of Power Budgeting Data are selected  
by increasing index values 1 to 7.  
13Ch  
7:0  
142  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
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