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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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February, 2007  
Device Power States  
10.1.1  
Device Power States  
The PEX 8532 supports the PCI Express PCI-PM D0, D3hot, and D3cold (no VAUX) Device Power  
Management states. The D1 and D2 states, which are optional in the PCI Express Base r1.0a, are  
not supported by the PEX 8532.  
The D3hot state can be entered from the D0 state, when system software programs the Power  
Management Status and Control register Power State field (offset 44h[1:0]=11b) for the appropriate  
port. The D0_uninitialized state can be entered from the D3hot state when the upstream and downstream  
links are in the L0s state and system software clears the Power Management Status and Control  
register Power State field (offset 44h[1:0]=00b).  
10.1.1.1  
D0 State  
D0 is divided into two distinct substates – uninitialized and active. When power is initially applied to a  
PCI Express component, it defaults to the D0_uninitialized state. The component remains in the  
D0_uninitialized state until the serial EEPROM load completes.  
A device enters the D0_active state when:  
Any single Memory Access Enable occurs  
System software sets any combination of the Command register Bus Master Enable, Memory  
Access Enable, and/or I/O Access Enable bits (offset 04h[2, 1, and/or 0], respectively)  
10.1.1.2  
10.1.1.3  
D3hot State  
A device in the D3hot state must be able to respond to Configuration accesses, allowing transition by  
software to the D0_uninitialized state. Once in the D3hot state, the device can later be transitioned into  
the D3cold state by removing power from the device. In the D3hot state, Hot Plug operations cause  
a PME in the PEX 8532.  
D3cold State  
The PEX 8532 transitions to the D3cold state when power is removed. Re-applying power causes the  
PEX 8532 to transition from the D3cold state into the D0_uninitialized state, followed by a  
configuration and link training sequence. The D3cold state assumes that all previous context is lost;  
therefore, software must save the required context while the PEX 8532 remains in the D3hot state.  
The PEX 8532 does not support AUX-Power; therefore, PME generation from D3cold  
is not supported.  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
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