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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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Hot Plug Support  
PLX Technology, Inc.  
9.3  
Hot Plug Interrupts  
Each Hot Plug Controller supports Hot Plug interrupt generation on the following events:  
Attention Button Pressed  
Power Fault Detected  
MRL Sensor Changed  
Presence Detect Changed  
Command Completed  
Hot Plug interrupts can be signaled by in-band INTx or MSI messages. Only one interrupt mechanism  
can be selected, and all Hot Plug ports must use the same mechanism.  
INTx interrupts are enabled if:  
INTA messages are enabled (Command register Interrupt Disable bit, offset 04h[10]=0) and,  
MSI is disabled (Message Control register MSI Enable bit, offset 48h[16]=0)  
MSI interrupts are enabled if:  
INTA messages are disabled (Command register Interrupt Disable bit, offset 04h[10]=1) and,  
MSI is enabled (Message Control register MSI Enable bit, offset 48h[16]=1)  
Depending on the downstream port power state, a Hot Plug event can generate a system interrupt or  
PME. When a PEX 8532 downstream port is in the D0 power state, Hot Plug events generate a system  
interrupt; when not in the D0 state, a PME interrupt message is generated by Hot Plug events. The  
Slot Status register Command Completed bit (offset 80h[20]) does not generate a PME interrupt  
message. When the system is in Sleep mode, Hot Plug operation uses PME logic to wake up the system.  
9.4  
Hot Plug Controller Power-Up/Down Sequence  
If a Transparent downstream port is enabled, the port’s Hot Plug Controller can power-up or  
power-down the slot. This section describes how this process occurs.  
9.4.1  
Slot Power-Up Sequence  
If a downstream port is connected to a slot, that port’s Hot Plug Controller can power up the slot, with or  
without an external serial EEPROM. Hot Plug Controller sequencing is determined by the states of the  
following bits:  
Slot Capabilities register Power Controller Present bit (offset 7Ch[1])  
• Slot Capabilities register MRL Sensor Present bit (offset 7Ch[2])  
(MRL is Manually operated Retention Latch)  
Slot Control register Power Controller Control bit (offset 80h[10])  
and the HP_MRLx# input state, if the MRL Sensor Present bit is set to 1. Hot Plug-configurable features  
are programmable only by the serial EEPROM.  
122  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
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