Hot Plug Support
PLX Technology, Inc.
9.1.2
Hot Plug Port External Signals
The PEX 8532’s Hot Plug Controllers include nine Hot Plug signals for each PCI Express port
(8 ports x 9 signals/port = 72 total signals), defined in Table 9-1. (Refer to Table 3-4, “PEX 8532 Hot
Plug Signals – 72 Balls,” for signal-to-ball mapping.)
Table 9-1. Hot Plug Signals
Signal Name
Type
Description
Hot Plug Attention LED Output Per Port
Active-Low Slot Control Logic output used to drive the Attention Indicator. Output is set Low to turn
On the LED. Enabled when the Slot Capabilities register Attention Indicator Present bit is set
(offset 7Ch[3]=1) and controlled by the Slot Control register Attention Indicator Control field
(offset 80h[7:6]). When software writes any value other than 00b (Reserved) to the Attention
Indicator Control field and an Attention_Indicator message is sent to the downstream device,
a Command Completed interrupt can be generated to notify the Host that the command has
been executed.
HP_ATNLEDx#
O
When the following conditions exist:
•
•
Slot Capabilities register Attention Indicator Present bit is set (offset 7Ch[3]=1), and
Slot Control register Command Completed Interrupt Enable bit is not masked
(offset 80h[4]=1), and
•
Slot Control register Hot Plug Interrupt Enable bit is set (offset 80h[5]=1),
an interrupt (MSI, or INTx message, both mutually exclusive) can be generated to the Host.
An external current-limiting resistor is required.
Hot Plug Attention Button Input Per Port
Active-Low Slot Control Logic input, directly connected to the Attention Button, with input assertion
status latched in the Slot Status register Attention Button Pressed field (offset 80h[16]).
Enabled when the Slot Capabilities register Attention Button Present bit is set (offset 7Ch[0]=1).
When the following conditions exist:
•
HP_BUTTONx# is not masked (Slot Control register Attention Button Pressed Enable bit
(offset 80h[0]=1), and
Slot Capabilities register Hot Plug Capable bit is set (offset 7Ch[6]=1), and
Slot Control register Hot Plug Interrupt Enable bit is set (offset 80h[5]=1),
I
PU
HP_BUTTONx#
•
•
an interrupt (MSI, or INTx message, both mutually exclusive) can be generated, to notify the Host
of intended board insertion or removal.
Note: HP_BUTTONx# is internally de-bounced, but must remain stable for at least 10 ms.
Reference Clock Enable Output Per Port
Active-Low output that, when enabled, allows external REFCLK to be provided to the slot.
Enabled when the Slot Capabilities register Power Controller Present bit is set (offset 7Ch[1]=1),
and controlled by the Slot Control register Power Controller Control bit (offset 80h[10]).
HP_CLKENx#
O
The time delay from HP_PWRENx# output assertion to HP_CLKENx# output assertion
is programmable (through serial EEPROM load) from 16 ms (default) to 128 ms, in the
HPC Tpepv Delay field (offset 1E0h[4:3]).
118
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
PLX [ PLX TECHNOLOGY ]
