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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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Hot Plug Support  
PLX Technology, Inc.  
Table 9-1. Hot Plug Signals (Cont.)  
Signal Name  
Type  
Description  
Active-Low Hot Plug Power Enable Output Per Port  
Active-Low Slot Control Logic output that controls the slot power state. When this signal is Low,  
power is enabled to the slot.  
Enabled when the Slot Capabilities register Power Controller Present bit is set (offset 7Ch[1]=1).  
When software turns the slot’s Power Controller On or Off (Slot Control register Power Controller  
Control bit, offset 80h[10]), a Command Completed interrupt can be generated to notify the Host  
that the command has been executed.  
When the following conditions exist:  
HP_PWRENx#  
O
Slot Control register Command Completed Interrupt Enable bit is not masked (offset  
80h[4]=1), and  
Slot Control register Hot Plug Interrupt Enable bit is set (offset 80h[5]=1),  
an interrupt (MSI, or INTx message, both mutually exclusive) can be generated to the Host.  
When HP_MRLx# is enabled [Slot Capabilities register MRL Sensor Present bit is set  
(offset 7Ch[2]=1)], HP_MRLx# input assertion enables Hot Plug output sequencing to turn On  
the slot’s power, by asserting HP_PWRENx# after reset or under software control.  
Hot Plug Power Fault Input Per Port  
Active-Low input that indicates the slot’s external Power Controller detected a power fault on one  
or more supply rails.  
Enabled when the Slot Capabilities register Power Controller Present bit is set (offset 7Ch[1]=1),  
and input assertion status is latched in the Slot Status register Power Fault Detected (offset 80h[17]).  
When the following conditions exist:  
HP_PWRFLTx# is not masked (Slot Control register Power Fault Detector Enable bit  
(offset 80h[1]=1), and  
I
HP_PWRFLTx#  
PU  
Slot Control register Hot Plug Interrupt Enable bit is set (offset 80h[5]=1),  
an interrupt (MSI, or INTx message, both mutually exclusive) can be generated, to notify the  
Host of a power fault.  
Note: If HP_PWRENx# and HP_CLKENx# are not used, HP_PWRFLTx# can be used as  
a general-purpose input with status reflected in the Slot Status register Power Fault Detected  
(offset 80h[17]), provided the Slot Capabilities register Power Controller Present bit is set  
(offset 7Ch[1]=1).  
Hot Plug Power LED Output Per Port  
Active-Low Slot Control Logic output used to drive the Power Indicator. This output is set Low to  
turn On the LED. Enabled when the Slot Capabilities register Power Indicator Present bit is set  
(offset 7Ch[4]=1), and controlled by the Slot Status register Power Indicator Control field (offset  
80h[9:8]). When software writes any value other than 00b (Reserved) to the Power Indicator Control  
field and a Power_Indicator message is sent to the downstream device, a Command Completed  
interrupt can be generated to notify the Host that the command has been executed.  
HP_PWRLEDx#  
O
When the following conditions exist:  
Slot Capabilities register Power Indicator Present bit is set (offset 7Ch[4]=1), and  
Slot Control register Command Completed Interrupt Enable bit is not masked (offset  
80h[4]=1), and  
Slot Control register Hot Plug Interrupt Enable bit is set (offset 80h[5]=1),  
an interrupt (MSI, or INTx message, both mutually exclusive) can be generated to the Host.  
An external current-limiting resistor is required.  
Note: If Hot Plug outputs (including HP_PERSTx#) are used and HP_MRLx# input is not used, pull HP_MRLx# Low so  
that Hot Plug outputs (including HP_PERSTx#) will properly sequence if the serial EEPROM is blank or missing.  
Default register values enable HP_MRLx#, which must then be asserted to cause Hot Plug outputs to toggle (for  
example, to de-assert HP_PERSTx# and assert HP_PWRLEDx#).  
120  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
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