February, 2007
Hot Plug Port External Signals
Table 9-1. Hot Plug Signals (Cont.)
Signal Name
Type
Description
Hot Plug Manually Operated Retention Latch Sensor Input Per Port
Active-Low input that triggers Slot Control Logic. Directly connected to an optional MRL Sensor
that is logic High when the latch is not closed. HP_MRLx# input assertion enables Hot Plug output
sequencing to turn On the slot’s power (HP_PWRENx# and HP_PWRLEDx#) and clock
(HP_CLKENx#), and de-assert Reset (HP_PERSTx#) after reset or under software control.
A change in the HP_MRLx# Input signal state is latched in the Slot Status register MRL Sensor
Changed bit (offset 80h[18]), and the state change can assert an interrupt to notify the Host of a
change in the MRL Sensor state.
When the following conditions exist:
•
HP_MRLx# is not masked (Slot Control register MRL Sensor Changed Enable bit,
offset 80h[2]=1), and
Slot Control register Hot Plug Interrupt Enable bit is set (offset 80h[5]=1),
I
PU
HP_MRLx#
•
an interrupt (MSI, or INTx message, both mutually exclusive) can be generated.
If the associated Hot Plug-capable downstream port connects to a PCI Express board slot that does
not implement an MRL Sensor, HP_MRLx# is normally connected to HP_PRSNTx# and a pull-up
resistor, with the common node connected to the PRSNT2# signal(s) at the slot. If the associated
Hot Plug-capable downstream port instead connects directly to a device (in which case Hot Plug
is not used), pull HP_MRLx# Low.
Note: HP_MRLx# is internally de-bounced, but must remain stable for at least 10 ms.
HP_MRLx#, if enabled, is not de-bounced when sampled immediately after reset.
Reset Output Per Port
HP_PERSTx#
O
Active-Low Hot Plug output used to reset the slot. Controlled by the Slot Control register
Power Controller Control bit (offset 80h[10]).
Combination of Hot Plug PRSNT1# and PRSNT2# Input Per Port
Active-Low input connected to the slot’s PRSNT2# signal, which on the add-in board connects to the
slot’s PRSNT1# signal, which is normally grounded on the PRSNT2# signal at the motherboard slot.
A change in the HP_PRSNTx# Input signal state is latched in the Slot Status register Presence
Detect Changed bit (offset 80h[19]), and the state change can assert an interrupt to notify the Host of
board presence or absence.
I
PU
When the following conditions exist:
HP_PRSNTx#
•
HP_PRSNTx# is not masked (Slot Control register Presence Detect Changed Enable bit
(offset 80h[3]=1), and
•
Slot Control register Hot Plug Interrupt Enable bit is set (offset 80h[5]=1),
an interrupt (MSI, or INTx message, both mutually exclusive) can be generated.
Note: HP_PRSNTx# is internally de-bounced, but must remain stable for at least 10 ms.
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
119
PLX [ PLX TECHNOLOGY ]
