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ISP1581BD 参数 Datasheet PDF下载

ISP1581BD图片预览
型号: ISP1581BD
PDF下载: 下载PDF文件 查看货源
内容描述: 通用串行总线2.0高速接口设备 [Universal Serial Bus 2.0 high-speed interface device]
分类和应用: 总线控制器微控制器和处理器外围集成电路数据传输时钟
文件页数/大小: 73 页 / 1657 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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Philips Semiconductors
ISP1581
USB 2.0 HS interface device
9.1 Register access
Register access depends on the bus width used:
8-bit bus:
multi-byte registers are accessed lower byte (LSB) first.
16-bit bus:
for single-byte registers the upper byte (MSB) must be ignored.
Endpoint specific registers are indexed via the Endpoint Index register. The target
endpoint must be selected first, before accessing the following registers:
Buffer Length
Control Function
Data Port
Endpoint MaxPacketsize
Endpoint Type
Short Packet.
9.2 Initialization registers
9.2.1
Address register (address: 00H)
This register is used to set the USB assigned address and enable the USB device.
Table 5
shows the Address register bit allocation.
reset or a soft reset occurs.
In response to the standard USB request SET_ADDRESS, the firmware must write
the (enabled) device address to the Address register, followed by sending an empty
packet to the host. The
new
device address is activated when the host acknowledges
the empty packet.
Table 5:
Bit
Symbol
Reset
Bus reset
Access
Address register: bit allocation
7
DEVEN
0
0
R/W
Table 6:
Bit
7
6 to 0
6
5
4
3
DEVADDR[6:0]
00H
00H
R/W
Endpoint Configuration register: bit description
Symbol
DEVEN
DEVADDR[6:0]
Description
A logic 1 enables the device.
This field specifies the USB device address.
2
1
0
9397 750 07648
© Philips Electronics N.V. 2000. All rights reserved.
Objective specification
Rev. 02 — 23 October 2000
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