ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Table 73: HcScratch register: bit description
Bit
Symbol
Access Value
Description
15 to 0
Scratch[15:0] R/W
0000H Scratch register value.
15.5.3 HcSoftwareReset register (W: A9H)
This register provides a means for software reset of the HC. To reset the HC, the
HCD must write a reset value of F6H to this register. On receiving this reset value,
the HC resets all the HC and OTG registers, except its buffer memory.
Table 74 contains the bit description of the register.
Code (Hex): A9 — write only
Table 74: HcSoftwareReset register: bit description
Bit
Symbol
Access Value Description
0000H Writing a reset value of F6H causes the HC to
reset all the registers except its buffer memory.
15 to 0 ResetValue
[15:0]
W
15.6 HC buffer RAM control registers
15.6.1 HcBufferStatus register (R/W: 2CH/ACH)
The bit allocation of the HcBufferStatus register is given in Table 75.
Code (Hex): 2C — read
Code (Hex): AC — write
Table 75: HcBufferStatus register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
reserved
PairedPTD
ISTL1
ISTL0
PingPong BufferDone BufferDone
Reset
Access
Bit
-
-
-
-
-
-
-
-
-
0
R
2
0
R
1
0
R
0
-
7
6
5
4
3
Symbol
reserved
ISTL1_
Active
Status
ISTL0_
Active
Status
Reset_HW ATL_Active
PingPong
Reg
INTL_
Active
ISTL1
BufferFull
ISTL0
BufferFull
Reset
-
-
0
0
0
0
0
0
0
Access
R
R
R/W
R/W
R/W
R/W
R/W
Table 76: HcBufferStatus register: bit description
Bit
Symbol
Description
15 to 11
10
-
reserved
PairedPTDPingPong 0 — Ping of paired PTD in ATL is active.
1 — Pong of paired PTD in ATL is active.
9
8
ISTL1
BufferDone
0 — The ISTL1 buffer has not yet been read by the HC.
1 — The ISTL1 buffer has been read by the HC.
0 — The ISTL0 buffer has not yet been read by the HC.
1 — The ISTL0 buffer has been read by the HC.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISTL0
BufferDone
9397 750 12337
Product data
Rev. 03 — 06 January 2004
99 of 150
NXP [ NXP ]
