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ISP1362BD 参数 Datasheet PDF下载

ISP1362BD图片预览
型号: ISP1362BD
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片通用串行总线- The-Go的控制器 [Single-chip Universal Serial Bus On-The-Go controller]
分类和应用: 控制器
文件页数/大小: 150 页 / 621 K
品牌: NXP [ NXP ]
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ISP1362  
Single-chip USB OTG controller  
Philips Semiconductors  
Bit  
7
6
5
4
3
2
1
0
Symbol  
Reset  
Access  
BufferStartAddress[7:0]  
0
0
0
0
0
0
0
0
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Table 78: HcDirectAddressLength register: bit description  
Bit Symbol Description  
31 to 16 DataByteCount [15:0]  
Total number of bytes to be accessed.  
reserved  
15  
-
14 to 0  
BufferStartAddress[14:0] The starting address of the buffer for accessing of data.  
15.6.3 HcDirectAddressData register (R/W: 45H/C5H)  
This is a data port for the HCD to access the ISTL, INTL or ATL buffers under the  
direct addressing mode. Table 79 contains the bit description of the register.  
Code (Hex): 45 read  
Code (Hex): C5 write  
Table 79: HcDirectAddressData register: bit description  
Bit  
Symbol  
Access Value Description  
15 to 0 DataWord R/W  
[15:0]  
0000H The data port for accessing the ISTL, INTL or ATL  
buffers. The address of the buffer and byte count of  
the data must be specied in the  
HcDirectAddressLength register.  
15.7 Isochronous (ISO) transfer registers  
15.7.1 HcISTLBufferSize register (R/W: 30H/B0H)  
This register requires you to allocate the size of the buffer to be used for ISO  
transactions. The buffer size specied in the register is applied to the ISTL0 and  
ISTL1 buffers. Therefore, ISTL0 and ISTL1 always have the same buffer size.  
Table 80 shows the bit description of the register.  
Code (Hex): 30 read  
Code (Hex): B0 write  
Table 80: HcISTLBufferSize register: bit description  
Bit  
Symbol  
Access Value  
Description  
15 to 0 ISTLBuffer R/W  
Size[15:0]  
0000H  
The size of the buffer to be used for ISO  
transactions and must be specied in bytes.  
15.7.2 HcISTL0BufferPort register (R/W: 40H/C0H)  
In addition to the HcDirectAddressData register, the ISP1362 provides this register to  
act as another data port for accessing the ISTL0 buffer. The starting address for  
accessing the buffer is always xed at 0000H. Therefore, random access of the ISTL0  
buffer is not allowed. The bit description of the register is given in Table 81.  
9397 750 12337  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 03 06 January 2004  
101 of 150  
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