ISP1362
Single-chip USB OTG controller
Philips Semiconductors
15.4.3 HcTransferCounter register (R/W: 22H/A2H)
Regardless of the programmed I/O (PIO) or DMA data transfer modes, this register is
used to initialize the number of bytes to be transferred to or from the ISTL, INTL or
ATL buffer RAM. For the count value loaded in the register to take effect, the HCD is
required to set bit 7 of the HcDMAConfiguration register to HIGH. When the count
value has reached, the HC needs to generate an internal EOT signal to set bit 2 of
the HcµPInterrupt register, AllEOInterrupt, and update the HcBufferStatus register.
The bit allocation of the HcTransferCounter register is given in Table 67.
Code (Hex): 22 — read
Code (Hex): A2 — write
Table 67: HcTransferCounter register: bit description
Bit
Symbol
Access Value
Description
15 to 0 CounterValue R/W
[15:0]
0000H
Number of data bytes to be read from or
written to the buffer RAM.
15.4.4 HcµPInterrupt register (R/W: 24H/A4H)
All the bits in this register are active at power-on reset. None of the active bits,
however, will cause an interrupt on the interrupt pin (INT1) unless they are set by the
respective bits in the HcµPInterruptEnable register and bit 0 of the
HcHardwareConfiguration register is also set.
After this register (24H–read) is read, the bits that are active will not be reset until
logic 1 is written to the bits in this register (A4H–write) to clear it.
The bits in this register are cleared only when you write to this register indicating the
bits to be cleared. To clear all the enabled bits in this register, the HCD must write
FFH to this register.
The bit allocation of the HcµPInterrupt register is given in Table 68.
Code (Hex): 24 — read
Code (Hex): A4 — write
Table 68: HcµPInterrupt register: bit allocation
Bit
15
14
13
12
11
10
9
8
ATL_IRQ
0
Symbol
Reset
Access
Bit
reserved
OTG_IRQ
-
-
-
-
-
-
-
-
-
-
0
R/W
1
-
7
-
6
R/W
5
4
3
2
0
Symbol
INTL_IRQ
ClkReady
HC
Suspended
OPR_Reg
AllEOT
Interrupt
ISTL_1_
INT
ISTL_0_
INT
SOF_INT
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
95 of 150
NXP [ NXP ]
