ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Table 83: HcISTLToggleRate register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
Reset
Access
Bit
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
Symbol
Reset
Access
reserved
ISTLToggleRate[3:0]
-
-
-
-
-
-
-
-
0
0
0
0
R/W
R/W
R/W
R/W
Table 84: HcISTLToggleRate register: bit description
Bit
Symbol
Description
15 to 4
3 to 0
-
reserved
ISTLToggleRate[3:0] The required toggle rate in ms.
15.8 Interrupt transfer registers
15.8.1 HcINTLBufferSize register (R/W: 33H/B3H)
This register allows you to allocate the size of the INTL buffer to be used for interrupt
transactions. The default value of the buffer size is set to 128 bytes, and the
maximum allowable allocated size is 4096 bytes. Table 85 shows the bit description
of the register.
Code (Hex): 33 — read
Code (Hex): B3 — write
Table 85: HcINTLBufferSize register: bit description
Bit
Symbol
Access Value
Description
15 to 0 INTLBuffer R/W
Size[15:0]
0080H The size of the buffer to be used for interrupt
transactions and must be specified in bytes.
15.8.2 HcINTLBufferPort register (R/W: 43H/C3H)
In addition to the HcDirectAddressData register, the ISP1362 provides this register to
act as another data port for accessing the INTL buffer. The starting address for
accessing the buffer is always fixed at 0000H. Therefore, random access of the INTL
buffer is not allowed. The bit description of the HcINTLBufferPort register is given in
Table 86.
Code (Hex): 43 — read
Code (Hex): C3 — write
Table 86: HcINTLBufferPort register: bit description
Bit
Symbol
Access Value
Description
15 to 0 DataWord R/W
[15:0]
0000H
The data in the INTL buffer to be accessed through
this data port.
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
103 of 150
NXP [ NXP ]
