ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Table 89: HcINTLPTDDoneMap register: bit description
Bit Symbol Access Value Description
0000H
31 to 0 PTDDone
Bits[31:0]
R
0 — The PTD stored in the INTL buffer has not
been successfully processed by the HC.
1 — The PTD stored in the INTL buffer has been
successfully processed by the HC.
15.8.5 HcINTLPTDSkipMap register (R/W: 18H/98H)
This is a 32-bit register, and the bit description is given in Table 90. Bit 0 of the
register represents the first PTD stored in the INTL buffer, bit 1 represents the second
PTD stored in the buffer, and so on. When a bit is set by the HCD, the corresponding
PTD is skipped and is not processed by the HC. The HC processes the skipped PTD
if the HCD has reset its corresponding skipped bit to logic 0. Clearing the
corresponding bit in the HcINTLPTDSkipMap register when there is no valid data in
the block will cause unpredictable behavior of the HC.
Code (Hex): 18 — read
Code (Hex): 98 — write
Table 90: HcINTLPTDSkipMap register: bit description
Bit
Symbol
Access Value
R/W 0000H
Description
31 to 0 SkipBits
[31:0]
0 — The HC processes the PTD.
1 — The HC skips processing the PTD.
15.8.6 HcINTLLastPTD register (R/W: 19H/99H)
This is a 32-bit register, and Table 91 shows its bit description. Bit 0 of the register
represents the first PTD stored in the INTL buffer, bit 1 represents the second PTD
stored in the buffer, and so on. The bit that is set to logic 1 by the HCD is used as an
indication to the HC that its corresponding PTD is the last PTD stored in the INTL
buffer. When the processing of the last PTD is complete, the HC proceeds to process
ATL transactions.
Code (Hex): 19 — read
Code (Hex): 99 — write
Table 91: HcINTLLastPTD register: bit description
Bit
Symbol
Acc Value
ess
Description
31 to 0 LastPTD
Bits[31:0]
R/W 0000H
0 — The PTD is not the last PTD stored in the buffer.
1 — The PTD is the last PTD stored in the buffer.
15.8.7 HcINTLCurrentActivePTD register (R: 1AH)
This register indicates which PTD stored in the INTL buffer is currently active and is
updated by the HC. The HCD can use it as a buffer pointer to decide which PTD
locations are currently free for filling in new PTDs to the buffer. This indication is to
prevent the HCD from accidentally writing into the currently active PTD buffer
location. Table 92 shows the bit allocation of the register.
Code (Hex): 1A — read only
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
105 of 150
NXP [ NXP ]
